FC6A S
ERIES
MICROS
MART
L
ADDER
P
ROGRAMMING
M
ANUAL
FC9Y-B1726 18-55
18: P
ULSE
O
UTPUT
I
NSTRUCTIONS
ARAMP1 instruction (single-pulse output reversible control enabled) timing chart
ARAMP1 instruction, S1 is specified as data register D0200, S2 is specified as internal relay M0000, S3 is disabled, D1 is
specified as data register D0000, D2 is specified as internal relay M0050
When the ARAMP instruction input changes from off to on, pulses are output from Q0 according to the settings configured by the
data registers. The reversible control signal is output from Q2 or Q1. When pulse output starts, M0050 turns on. M0052 turns on
while the pulse frequency is increasing or decreasing. When the number of pulses configured for each step is output, the next step
is executed. When pulse output is complete for the step where the next step number is set to 0, then the pulses will stop. In this
situation, M0050 turns off and M0051 turns on.
If the ARAMP instruction input turns off during pulse output, pulse output ends. If this input turns on again, the operation starts
from the beginning. Even if the contents of the data registers are changed during pulse output, the change is not reflected in the
pulse output operation. The changed content is reflected the next time the ARAMP instruction is started.
In this application, switching between forward and reverse must be executed when the pulse frequency is decreased to the
minimum value, so a step is inserted to decrease the frequency before reversing.
ARAMP instruction input
Pulse frequency Q0
Pulse output ON M0050
Pulse output complete M0051
Pulse output status M0052
Control direction 0 (Forward) 1 (Reverse)
Reversible control
signal
Q2 (All-in-One CPU module)
Q1 (CAN J1939 All-in-One CPU module)
S3S2
M0000
ARAMP
1
S1
D0200
ARAMP instruction
input
D2
M0050
D1
D0000