IDEC MICROSmart FC6A Series Ladder Programming Manual

18: P ULSE O UTPUT I NSTRUCTIONS
18-56 FC6A S ERIES MICROS MART L ADDER P ROGRAMMING M ANUAL FC9Y-B1726
ARAMP1 instruction (dual-pulse output reversible control enabled) timing chart
All-in-One CPU module, ARAMP1 instruction, S1 is specified as data register D0200, S2 is specified as internal relay
M0000, S3 is disabled, D1 is specified as data register D0000, D2 is specified as internal relay M0050
When the ARAMP instruction input changes from off to on, pulses are output from Q0 according to the settings configured by the
data registers. The reversible control signal is output from Q0 or Q1. When pulse output starts, M0050 turns on. M0052 turns on
while the pulse frequency is increasing or decreasing. The pulses increase and decrease according to the frequency change time
until they reach the steady pulse frequency from the current pulse frequency. When the configured number of pulses are output,
the pulses stop. In this situation, M0050 turns off and M0051 turns on.
If the ARAMP instruction input turns off during pulse output, pulse output ends. If the ARAMP instruction input turns on again, the
operation starts from the beginning. Even if the contents of the data registers are changed during pulse output, the change is not
reflected in the pulse output operation. The changed content is reflected the next time the ARAMP instruction is started.
In this application, switching between forward and reverse must be executed when the pulse frequency is decreased to the
minimum value, so a step is inserted to decrease the frequency before reversing.
ARAMP instruction input
Forward pulse (CW) Q0
Pulse output ON M0050
Pulse output
complete
M0051
Pulse output status M0052
Control direction 0 (Forward) 1 (Reverse)
S3S2
M0000
ARAMP
1
S1
D0200
ARAMP instruction
input
D2
M0050
D1
D0000
Reverse pulse (CCW) Q1

IDEC MICROSmart FC6A Series Specifications

General

Brand	IDEC
Model	MICROSmart FC6A Series
Category	Computer Hardware
Language	English