Intel Agilex Series

Document Version Intel Quartus
Prime Version
Changes
•
Added a new recommendation on clearing the RSU_STATUS command after the JTAG reconfiguration in the Debugging
Guidelines for the JTAG Configuration Scheme section.
• Updated the Error Codes table. Added new error code responses:
—
HW_ERROR
—
COMMAND_SPECIFIC_ERROR
• Removed outdated text from the Understanding the Reset Release IP Requirement section. The text stated that an Intel
Quartus Prime Pro Edition legality check prevents you from instantiating more than one instance of the Reset Release Intel
FPGA IP.
• Removed anti-tamper protection feature from the Device Security section. Anti-tamper is not available in the Intel Quartus
Prime Pro Edition software version 20.3.
• Revised text on error detection and correction in the Understanding SEUs section. The text states that the LSM firmware
provides SEU single bit error and double adjacent bit error detection and correction. The multi-bit error and non-adjacent
bit error are detected, but cannot be corrected.
2020.06.30 20.2 Made the following changes:
• Updated Intel Agilex Configuration Overview:
— Renamed Intel Agilex Configuration Data Width, Clock Rates, and Data Rates table to Intel Agilex Configuration
Scheme, Data Width,and MSEL.
— Revised CvP section.
— In the AS Fast Mode section, clarified difference between AS normal mode and AS fast mode.
• Revised configuration bitstream authentication statement in the Secure Device Manager section. During the configuration
Start state, the SDM authenticates the the Intel-generated configuration firmware and configuration bitstream, ensuring
that configuration bitstream is from a trusted source.
• Added Programmer link in the Updating the SDM Firmware section.
continued...
9. Document Revision History for the Intel Agilex Configuration User Guide
683673 | 2021.10.29
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