5.2. Guidelines for Performing Remote System Update Functions for Non-HPS......................................................................... 155
5.3. Commands and Responses......................................................................................................................................... 156
5.3.1. Operation Commands.................................................................................................................................... 158
5.3.2. Error Code Responses....................................................................................................................................166
5.3.3. Error Code Recovery......................................................................................................................................167
5.4. Quad SPI Flash Layout...............................................................................................................................................168
5.4.1. High Level Flash Layout................................................................................................................................. 168
5.4.2. Detailed Quad SPI Flash Layout.......................................................................................................................175
5.5. Generating Remote System Update Image Files Using the Programming File Generator...................................................... 182
5.5.1. Generating the Initial RSU Image.................................................................................................................... 182
5.5.2. Generating an Application Image.....................................................................................................................187
5.5.3. Generating a Factory Update Image.................................................................................................................189
5.5.4. Command Sequence To Perform Quad SPI Operations........................................................................................ 194
5.6. Remote System Update from FPGA Core Example..........................................................................................................194
5.6.1. Prerequisites................................................................................................................................................ 195
5.6.2. Creating Initial Flash Image Containing Bitstreams for Factory Image and One Application Image............................ 196
5.6.3. Programming Flash Memory with the Initial Remote System Update Image........................................................... 200
5.6.4. Reconfiguring the Device with an Application or Factory Image............................................................................201
5.6.5. Adding an Application Image ......................................................................................................................... 202
5.6.6. Removing an Application Image...................................................................................................................... 205
6. Intel Agilex Configuration Features....................................................................................................................................207
6.1. Device Security.........................................................................................................................................................207
6.2. Configuration via Protocol...........................................................................................................................................207
6.3. Partial Reconfiguration...............................................................................................................................................209
7. Intel Agilex Debugging Guide............................................................................................................................................. 210
7.1. Configuration Debugging Checklist.............................................................................................................................. 210
7.2. Intel Agilex Configuration Architecture Overview........................................................................................................... 212
7.3. Understanding Configuration Status Using quartus_pgm command.................................................................................. 212
7.4. Configuration File Format Differences...........................................................................................................................213
7.5. Understanding SEUs.................................................................................................................................................. 214
7.6. Reading the Unique 64-Bit CHIP ID..............................................................................................................................214
7.7. E-Tile Transceivers May Fail To Configure...................................................................................................................... 214
7.8. Understanding and Troubleshooting Configuration Pin Behavior....................................................................................... 215
Contents
Intel
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Agilex
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Configuration User Guide
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