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Lucent 5ESS DRM User Manual

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BIT 1: ACTIVE - Indicates that the associated administrative
module (AM) is on-line (SSR bit 16).
BIT 0: ASW - Indicates that the EAI thinks that all seems well
(that is, no internal faults or EAoutput errors
have been detected by EAI audit or self-test
firmware).
Digit 17 = EAI status digit.
The bits are numbered from right to left as follows:
BIT32 10
BIT 3: PRM - Indicates that a processor recovery message
has been received from the administrative
module (AM). This bit will remain set
until being read by the MTTY controller.
BIT 2: SPR - Indicates that a processor recovery maintenance
reset function (MRF) has started. This bit
will remain set until being read by the MTTY
controller.
NEW
PRM
MRF
START
PULSE POINT
REGISTER
BIT 23
PULSE POINT
REGISTER
BIT 22
HARDWARE STATUS BITS (2 of 6)
Figure A2-1 Hardware Status Bits (2 of 6)
235-200-150
January 2003
APPENDIX 2
PROCESSOR RECOVERY MESSAGES
Issue 3.00 Page A2-21

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Lucent 5ESS DRM Specifications

General IconGeneral
BrandLucent
Model5ESS DRM
CategoryControl Unit
LanguageEnglish