Marvell Integrated Controller 88F6281 - Figure 24: TWSI Test Circuit; Figure 25: TWSI Output Delay AC Timing Diagram; Figure 26: TWSI Input AC Timing Diagram

88F6281
Hardware Specifications
Doc. No. MV-S104859-U0 Rev. E Copyright © 2008 Marvell
Page 104 Document Classification: Proprietary Information December 2, 2008, Preliminary
8.6.8.2 TWSI Test Circuit
Figure 24: TWSI Test Circuit
8.6.8.3 TWSI AC Timing Diagrams
Figure 25: TWSI Output Delay AC Timing Diagram
Figure 26: TWSI Input AC Timing Diagram
CL
RL
VDDIO
Test Point
SCK
SDA
Vih(min)
Vil(max)
Vih(min)
Vil(max)
tHIGH tLOW
tOV(max)
tOV(min)
Vih(min)
Vil(max)
Vih(min)
Vil(max)
tSU
tLOW tHIGH
SCK
SDA
tHD