Marvell Integrated Controller 88F6281 - Figure 35: SPI (Master Mode) Output AC Timing Diagram; Figure 36: SPI (Master Mode) Input AC Timing Diagram

88F6281
Hardware Specifications
Doc. No. MV-S104859-U0 Rev. E Copyright © 2008 Marvell
Page 112 Document Classification: Proprietary Information December 2, 2008, Preliminary
8.6.12.3 SPI (Master Mode) Timing Diagrams
Figure 35: SPI (Master Mode) Output AC Timing Diagram
Figure 36: SPI (Master Mode) Input AC Timing Diagram
SCLK
tCLtCH
Data
Out
CS
tDOVmax
tDOVmin
tCSB tCSA
tSU
SCLK
Data in
tHD