Marvell Integrated Controller 88F6281 - Table 19: Secure Digital Input;Output (SDIO) Interface Signal Assignment

88F6281
Hardware Specifications
Doc. No. MV-S104859-U0 Rev. E Copyright © 2008 Marvell
Page 42 Document Classification: Proprietary Information December 2, 2008, Preliminary
1.2.17 Secure Digital Input/Output (SDIO) Interface
Note
All of the SDIO signals are multiplexed on the MPP pins (see Section 4, Pin Multiplexing,
on page 51
).
Table 19: Secure Digital Input/Output (SDIO) Interface Signal Assignment
Pin Name
I/O
Pin Type Power Rail
Description
SD_CLK O CMOS VDDO SDIO Clock
SD_CMD I/O CMOS VDDO SDIO Command
Used to transfer a command serially from the SDIO host to the
SDIO device. Used to transfer a command response serially
from the SDIO device to the SDIO host.
NOTE: This pin requires a pull up on board.
SD_D[3:0] I/O CMOS VDDO SDIO Data Input/Output
Used to transfer data from the SDIO host to the SDIO device or
vice versa.
NOTE: These pins require a pull up on board.