Marvell Integrated Controller 88F6281 - Table 41: SDRAM DDR2 Interface DC Electrical Specifications

Electrical Specifications
DC Electrical Specifications
Copyright © 2008 Marvell Doc. No. MV-S104859-U0 Rev. E
December 2, 2008, Preliminary Document Classification: Proprietary Information Page 83
8.5.3 SDRAM DDR2 Interface DC Electrical Specifications
In the following table, VREF is VDD_M/2 and VDDIO means the VDD_M power rail.
Table 41: SDRAM DDR2 Interface DC Electrical Specifications
Parameter Symbol Test Condition Min Typ Max Units Notes
Input low level VIL - -0.3 VREF - 0.125 V -
Input high level VIH - VREF + 0.125 VDDIO + 0.3 V -
Output low level VOL IOL = 13.4 mA 0.28 V -
Output high level VOH IOH = -13.4 mA 1.42 V -
120 150 180 ohm 1 , 2
60 75 90 ohm 1 , 2
40 50 60 ohm 1 , 2
Deviation of VM w ith respect to VDDQ/2 dVm See note 3 -6 6 % 3
Input leakage current IIL 0 < VIN < VDDIO -10 10 uA 4, 5
Pin capacitance Cpin - 5 pF -
Notes:
General comment: See the Pin Description section for internal pullup/pulldow n.
1. See SDRAM functional description section for ODT configuration.
2. Measurement definition for RTT: Apply VREF +/- 0.25 to input pin separately,
then measure current I
(VREF + 0.25)
and I
(VREF - 0.25)
respectively.
3. Measurement definition for VM: Measured voltage (VM) at input pin (midpoint) w ith no load.
4. While I/O is in High-Z.
5. This current does not include the current flow ing through the pullup/pulldown resistor.
Rtt effective impedance value RTT See note 2
)25.0()25.0(
5.0
−+
−
=
VREFVREF
II
RTT
%1001
2
×
⎟
⎠
⎞
⎜
⎝
⎛
−
×
=
VDDIO
Vm
dVM