Pin Multiplexing
Multi-Purpose Pins Functional Summary
Copyright © 2008 Marvell Doc. No. MV-S104859-U0 Rev. E
December 2, 2008, Preliminary Document Classification: Proprietary Information Page 51
4 Pin Multiplexing
4.1 Multi-Purpose Pins Functional Summary
The 88F6281 device contains 50 Multi-Purpose Pins (MPP). Each one can be assigned to a different
functionality through the MPP Control register.
General Purpose pins: MPP[5:0] and MPP[49:7]:
• GPIO (input/output): MPP[0], MPP[4], MPP[9:8], MPP[11], MPP[17:13], MPP[32:20], and
MPP[49:34]
• GPO (output): MPP[3:1], MPP[5], MPP[7], MPP[10], MPP[12], MPP[19:18], and MPP[33]
SYSRST_OUTn: Reset request from the device to the board reset logic. This pin is an output.
SYSRST_OUTn is the default setting for MPP[6].
PEX_RST_OUTn: Optional PCI Express Endpoint card reset output.
MII/MMII/GMII/RGMII interface signals
SATA0/1_ACTn/SATA0/1_PRESENTn (port 0 and port 1): SATA active and SATA present
indications—see the SATA section in the 88F6180, 88F6190, 88F6192, and 88F6281
Functional Specifications.
NF_IO[7:0] (NAND Flash data [7:0])
SPI interface: SPI_MOSI, SPI_MISO, SPI_SCK, SPI_CSn
UART interface (port 0 and port 1): Transmit and receive functions: UA0_TXD, UA0_RXD,
UA1_TXD, UA1_RXD, and Modem control functions: UA0_RTSn, UA0_CTSn, UA1_RTSn,
UA1_CTSn
SDIO interface: SD_CLK, SD_CMD, SD_D[3:0]
Audio interface signals: AU_SPDIFI, AU_SPDIFO, AU_SPDIFRMCLK, AU_I2SBCLK,
AU_I2SDO, AU_I2SLRCLK, AU_I2SMCLK, AU_I2SDI, AU_EXTCLK
TS (Transport Stream) interface signals: TSMP[12:0]
TDM/SPI interface signals: TDM_CH0/2_TX_QL, TDM_CH0/2_RX_QL, TDM_SPI_CS0/1,
TDM_SPI_SCK, TDM_SPI_MOSI, TDM_SPI_MISO, TDM_CODEC_INTn,
TDM_CODEC_RSTn, TDM_PCLK, TDM_FS, TDM_DRX, TDM_DTX
PTP signals: PTP_EVENT_REQ, PTP_TRIG_GEN, PTP_CLK
TWSI signals: TW_SDA, TW_SCK
To Next Page
Loading...