Pin and Signal Descriptions
Pin Descriptions
Copyright © 2008 Marvell Doc. No. MV-S104859-U0 Rev. E
December 2, 2008, Preliminary Document Classification: Proprietary Information Page 27
1.2.5 SATA Interface Pin Assignments
Table 7: SATA Port Interface Pin Assignment
Pin Name I/O Pin
Type
Power Rail Description
SATA0_T_P/N
SATA1_T_P/N
O CML SATA0/1_AVDD Transmit Data: Differential analog output of SATA II
port0/1
SATA0_R_P/N
SATA1_R_P/N
I CML SATA0/1_AVDD Receive Data: Differential analog input of SATA II port0/1
SATA0_PRESENTn
SATA1_PRESENTn
O CMOS VDDO/
VDD_GE_B
When this signal is asserted there is an active link
between the SATA II port and the external device (disk).
NOTE: These signals are multiplexed on the MPP pins
(see Section 4, Pin Multiplexing, on page 51).
SATA0_ACTn
SATA1_ACTn
O CMOS VDDO/
VDD_GE_B
When this signal is asserted, there is an active and used
link between the SATA II port and the external device
(disk).
NOTE: These signals are multiplexed on the MPP pins
(see Section 4, Pin Multiplexing, on page 51).
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