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3.4 I/O Signals for Programmable Controller CPU
3.4.1 I/O signal list
3
SPECIFICATIONS
3.4 I/O Signals for Programmable Controller CPU
This section explains the I/O signals for the programmable controller CPU of QJ71MB91.
3.4.1 I/O signal list
This section explains the I/O signals for the QJ71MB91.
The following I/O signal assignment is based on the case where the start I/O No. of the
QJ71MB91 is "0000" (installed to slot 0 of the main base unit).
Device X represents an input signal from the QJ71MB91 to the programmable controller
CPU.
Device Y means an output signal from the programmable controller CPU to the
QJ71MB91.
The I/O signals for programmable controller CPU are listed below.
Refer to the reference sections for the details of each signal.
* 1 Turns ON when the QJ71MB91 is ready after the programmable controller is turned from OFF to
ON or after the programmable controller CPU is reset.
(Continued on next page)
Table3.3 I/O signal list
Signal direction QJ71MB91 Programmable controller CPU Signal direction Programmable controller CPU QJ71MB91
Device No. Signal name Reference Device No. Signal name Reference
X0
Module READY
*1
ON : Accessible
OFF : Inaccessible
Section
11.1
Y0
Use prohibited -
X1
Use prohibited -
Y1
X2 Y2
X3 Y3
X4
CH1 Automatic communication
parameter setting, normally completed
ON : Normally completed
OFF : -
Section
5.2.1,
9.1.1
Y4
CH1 Automatic communication parameter
setting request/automatic communication
start request
ON : Being requested
OFF : Not requested
Section
5.2.1,
9.1.1
X5
CH1 Automatic communication
parameter setting, error completed
ON : Error completed
OFF : -
Y5 Use prohibited -
X6
CH1 Automatic communication
operation status
ON : Operating
OFF : Stopped
Y6
CH1 Automatic communication stop
request
ON : Being requested
OFF : Not requested
Section
5.2.1
X7
CH1 Automatic communication error
status
ON : Error occurred
OFF : No error
Section
5.2.1
Y7 Use prohibited -
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