Nuvoton NuMicro MS51PC0AE - Page 13

MS51
Nov. 28, 2019 Page 13 of 491 Rev 1.00
MS51 32K SERIES TECHNICAL REFERENCE MANUAL
 Software Write 1 to ADCS bit.
 External pin (STADC) trigger
 PWM trigger.
 Support continues convert function auto store the A/D
conversion result in XRAM.
Communication Interfaces
UART
 Supports up to 2 UARTs: UART0, UART1,
 Three sets ISO 7816-3 device configuration as UART
 UART baud rate clock from HIRC or HXT.
 Full-duplex asynchronous communications
 Programmable 9
th
bit.
 TXD and RXD pins of UART0 exchangeable via software.
I
2
C
 1 sets of I
2
C devices
 Master/Slave mode
 Bidirectional data transfer between masters and slaves
 Multi-master bus (no central master)
 7-bit addressing mode
 Standard mode (100 kbps) and Fast mode (400 kbps).
 Supports 8-bit time-out counter requesting the I
2
C interrupt if
the I
2
C bus hangs up and timer-out counter overflows
 Multiple address recognition (four slave addresses with mask
option)
 Supports hold time programmable
SPI
 1 sets of SPI devices
 Supports Master or Slave mode operation
 Supports MSB first or LSB first transfer sequence
 slave mode up to 12 MHz
ISO-7816
 Three sets ISO 7816-3 device
 Supports ISO 7816-3 compliant T=0, T=1
 Supports full-duplex UART mode.
GPIO
 Four I/O modes:
 Quasi-bidirectional mode
 Push-Pull Output mode
 Open-Drain Output mode
 Input only with high impendence mode
 Schmitt trigger input / TTL mode selectable.
 Each I/O pin configured as interrupt source with edge/level