Nuvoton NuMicro MS51PC0AE - Page 276

MS51
Nov. 28, 2019 Page 276 of 491 Rev 1.00
MS51 32K SERIES TECHNICAL REFERENCE MANUAL
6.4.4 Control Registers of GPIO
The MS51 has a lot of I/O control registers to provide flexibility in all kinds of applications. The SFR
related with I/O ports can be categorized into four groups: input and output control, output mode
control, input type and sink current control, and output slew rate control. All of SFR are listed as
follows.
Input and Output Data Control 6.4.4.1
These registers are I/O input and output data buffers. Reading gets the I/O input data. Writing forces
the data output. All of these registers are bit-addressable.
Pn – Port (Bit-addressable)
Register
SFR Address
Reset Value
P0
80H, All pages, Bit-addressable
1111_1111 b
P1
90H, All pages, Bit-addressable
1111_1111 b
P2
A0H, All pages, Bit-addressable
0011_1111 b
P3
B0H, All pages, Bit-addressable
1111_1111 b
7
6
5
4
3
2
1
0
Pn.7
Pn.6
Pn.5
Pn.4
Pn.3
Pn.2
Pn.1
Pn.0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit
Name
Description
7:0
Pn[7:0]
Port n
Port n is an maximum 8-bit general purpose I/O port.
GPIO Mode Control 6.4.4.2
These registers control GPIO mode, which is configurable among four modes: input-only, quasi-
bidirectional, push-pull, or open-drain. Each pin can be configured individually.
As default after reset all GPIO setting as input only mode.
PnM1.X
PnM2.X
I/O Type
0
0
Quasi-bidirectional
0
1
Push-pull
1
0
Input-only (high-impedance)
1
1
Open-drain