P33 FB pin input enable
0 = PWM0 output Fault Braked by P33 FB pin input Disabled.
1 = PWM0 output Fault Braked by P33 FB pin input Enabled. Once an edge, which matches
FBINLS (FBD.6) selection, occurs on FB pin, PWM0C0~C5 output Fault Brake data in
FBD register. PWMRUN (PWM0CON0.7) will also be automatically cleared by hardware.
The PWM output resumes when PWMRUN is set again.
Note: This bit is only for PWM0CON0.