Nuvoton NuMicro MS51PC0AE - Page 338

MS51
Nov. 28, 2019 Page 338 of 491 Rev 1.00
MS51 32K SERIES TECHNICAL REFERENCE MANUAL
PWMnCxH – PWMn Channel x Duty High Byte, n = 0,1,2,3; x = 0,1,2,3,4,5
7
6
5
4
3
2
1
0
PWMnCx [15:8]
R/W
Bit
Name
Description
7:0
PWMnCx [15:8]
PWMnCx duty high byte
This byte with PWMnCxL controls the duty of the output signal PGx from PWM generator.
Register
SFR Address
Description
Reset Value
PWM0C0H
D2H, Page 0
PWM0 Channel 0 Duty High Byte
0000_0000 b
PWM0C1H
D3H, Page 0
PWM0 Channel 1 Duty High Byte
0000_0000 b
PWM0C2H
D4H, Page 0
PWM0 Channel 2 Duty High Byte
0000_0000 b
PWM0C3H
D5H, Page 0
PWM0 Channel 3 Duty High Byte
0000_0000 b
PWM0C4H
C4H, Page 1
PWM0 Channel 4 Duty High Byte
0000_0000 b
PWM0C5H
C5H, Page 1
PWM0 Channel 5 Duty High Byte
0000_0000 b
PWM1_CH0H
AAH, Page 2
PWM1 Channel 0 Duty High Byte
0000_0000 b
PWM1_CH1H
ABH, Page 2
PWM1 Channel 1 Duty High Byte
0000_0000 b
PWM2_CH0H
BAH, Page 2
PWM2 Channel 0 Duty High Byte
0000_0000 b
PWM2_CH1H
BBH, Page 2
PWM2 Channel 1 Duty High Byte
0000_0000 b
PWM3_CH0H
CAH, Page 2
PWM3 Channel 0 Duty High Byte
0000_0000 b
PWM3_CH1H
CBH, Page 2
PWM3 Channel 1 Duty High Byte
0000_0000 b