Table 61. Revision history
Revision Date Description of changes
• Changed all instances of “4.0 < VDD_HV_ADV_SD < 5.5” in the Conditions column to “4.5 <
VDD_HV_ADV_SD < 5.5”. Modified voltage range in its footnote.
• Changed SNR
SE150
, GAIN = 16 condition min value to 55 dB (was 60).
• Changed SINAD
SE150
, GAIN = 16 condition min value to 54 dB (was 59).
• Unit for SINADDIFF150, SINADDIFF333 and SINADSE150 changed from dBFs to dB.
• For Z
IN
specification, revised parameter footnote.
• Added CMRR to symbol column for Common mode rejection ratio specification. Changed min
value to 55 dB.
• For δ
GROUP
specification, revised maximum values for OSR = 24 to OSR = 256 conditions.
• Revised entire row for t
LATENCY
, t
SETTLING
, and t
ODRECOVERY
specifications. Footnote added to
t
LATENCY
parameter.
• Added I
BIAS
specification.
• Changed IADV_D and ΣIADR_D values.
In section Temperature sensor, Table 21 :
• Changed TACC values.
• Removed ITEMP_SENS spec item.
In section LFAST interface timing diagrams, Figure 12, "|ΔVOD|" changed to "|VOD|".
In section LFAST and MSC /DSPI LVDS interface electrical characteristics, Table 24, the max.
value for Rise/ Fall time specs changed from 4.0 to 5.7 ns.
In section LFAST PLL electrical characteristics, Table 25, ΔPER
EYE
specification, changed Nominal
value to 550 (was blank) and Max value to blank (was 400).
In section Recommended power transistors, Table 27, added the specification for V
C
.
In section Power management integration :
• In Figure 17 :
• Changed "n x C
LV
" to "C
LV
".
• Changed C
HV_ADC_S
to C
HV_ADC_SAR
.
• In Table 28 :
• Changed the first footnote for CHV_PMC to have the same footnote number as the first
footnote for CLV as they were identical.
• Modified Minimum V
DD_HV_ADV_SAR
external capacitance and associated footnote.
Added section Regulator example for the NJD2873 transistor.
Added section Regulator example for the 2SCR574d transistor.
In section Device voltage monitoring, Table 29 :
• Updated following specs:
• LVD_core_hot
• LVD_core_cold
• HVD_core
• LVD_HV
• HVD_HV
• LVD_IO
• LVD_SAR
• Removed following specs:
• LVD_FLASH
• HVD_FLASH
• LVD_MSC_3V3
• LVD_MSC_5V0
• LVD_FEC_5V0
• LVD_JTAG
• HVD_SAR
Table continues on the next page...
Revision history
SPC5746R Microcontroller Data Sheet, Rev. 6, 06/2017
NXP Semiconductors 93
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