MPC5777M Microcontroller Data Sheet, Rev. 6
Document revision history
NXP Semiconductors166
5 6/2015
Electrical characteristics—ADC specifications
In Table 27 (SARn ADC electrical specification)
•I
ADCREFH
specification: changed min value for Run mode t
conv
5 µs condition to 7 µA
(was 3.5). Changed max value for Power Down mode condition to 6 µA (was 1).
•I
ADV_S
specification, Power Down mode: changed max value to 1.0 mA (was 0.04).
• INL and DNL rows: removed injection current footnote.
•TUE
12
row: changed footnote text to “This parameter is guaranteed...” (was “TUE, INL,
and DNL are granted...”). Removed T
J
< 150 °C, V
DD_HV_ADV_S
>4V,
V
DD_HV_ADR_S
> 4 V condition row.
In Table 28 (SDn ADC electrical specification)
•V
OFFSET
: Changed parameter name to “Input Referred Offset Error” (was “Conversion
Offset”) and added footnote (“Conversion offset error must be...”).
•SNR
DIFF150
, SNR
DIFF333
, SNR
SE150
: removed footnote (“SNR degraded by 3dB...”)
and changed conditions range to 4.5 (was 4.0).
•SNR
SE150
specification: revised min values for each condition. Added footnote (“This
parameter is guaranteed...”).
• For first footnote “S/D ADC is functional in the range...” changed voltage range to
3.6 V–4.5 V (was 3.6 V < V
DD_HV_ADV_D
< 4.0 V) and added “Degraded SNR value
based on simulation.”
• For second footnote “S/D ADC is functional in the range...” changed voltage range to
3.0 V–4.5 V and added “Degraded SNR value based on simulation.”
•V
cmrr
specification: changed min value to 54 dB (was 20 dB).
•
GROUP
specification: increased the max value for each condition by 3 Tclk.
• I
ADR_D
specification: changed max value to 30 µA (was 20). Added “f
ADCD_M
=
14.4 MHz” to condition.
Electrical characteristics—LFAST electrical specifications
Table 30 (LVDS pad startup and receiver electrical characteristics,)
• Revised entire R
IN
specification row.
Table 31 (LFAST transmitter electrical characteristics,)
•f
DATA
: Changed max value to "312/320" (was 320) and added footnote.
Table 33 (LFAST PLL electrical characteristics)
• Changed ERR
REF
and DC
REF
parameter descriptions to “PLL input reference clock”
(was “PLL reference clock”).
Electrical characteristics—Power management: PMC, POR/LVD, sequencing
Table 36 (Flash power supply)
• Removed V
DD_HV_PMC
row (this specification documented in Table 8 (Device
operating conditions).
Electrical characteristics—Flash memory electrical characteristics
• Added Section 3.15.7, Flash read wait state and address pipeline control settings.
Electrical characteristics—AC specifications—DSPI
• Substantial revisions to Section 3.16.2, DSPI timing with CMOS and LVDS pads.
Electrical characteristics—AC specifications—FlexRay
Table 66 (RxD input characteristics)
• Revised footnote (“FlexRay RxD timing is valid . . .”).
Table 76. Revision history (continued)
Revision Date Description of changes
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