A-107
Appendices
CP2E CPU Unit Software User’s Manual(W614)
A-5 Memory Map
App
A-5 Memory Map
PLC memory addresses are set in Index Registers (IR00 to IR15) to indirectly address I/O memory.
Normally, use the MOVE TO REGISTER (MOVR(560)) and MOVE TIMER/COUNTER PV TO REGIS-
TER (MOVRW(561)) instructions to set PLC memory addresses into the Index Registers.
Some instructions, such as FIND MAXIMUM (MAX(182)), and FIND MINIMUM (MIN(183)), output the
results of processing to an Index Register to indicate an PLC memory address.
There are also instructions for which Index Registers can be directly designated to use the PLC mem-
ory addresses stored in them by other instructions. These instructions include DOUBLE MOVE
(MOVL(498)), some symbol comparison instructions (=L, <>L, <L, >L, <=L, and >=L), DOUBLE COM-
PARE (CMPL(060)), DOUBLE INCREMENT BINARY (++L(591)), DOUBLE DECREMENT BINARY
(––L(593)), DOUBLE SIGNED BINARY ADD WITHOUT CARRY (+L(401)), DOUBLE SIGNED BINARY
SUBTRACT WITHOUT CARRY (–L(411)).
The PLC memory addresses all are continuous and the user must be aware of the order and bound-
aries of the memory areas. As reference, the PLC memory addresses are provided in a table at the end
of this appendix.
Note Directly setting PLC memory addresses in the program should be avoided whenever possible. If PLC mem-
ory addresses are set in the program, the program will be less compatible with new CPU Unit models or CPU
Units for which changes have been made to the layout of the memory.
There are two classifications of the RAM memory in a CP-series CPU Unit.
Parameter Areas: These areas contain CPU Unit system setting data, such as the PLC Setup, CPU
Bus Unit Setups, etc. An illegal access error will occur if an attempt is made to access any of the
parameter areas from an instruction in the user program.
I/O Memory Areas: These are the areas that can be specified as operands in the instructions in user
programs.
PLC Memory Addresses
Memory Configuration
To Next Page
Loading...
Need help?
General
