Appendix B: Cable Information
Ethernet Connectors
SmartBits 600x/6000x Installation Guide | 109
O23TXD3_0+ TXD3+ 63 TXD3_0– TXD3–
O24
TXD3_1+ DNC (Note 5) 64 TXD3_1– DNC (Note 5)
O25
TXEN3+ DNC (Note 5) 65 TXEN3– DNC (Note 5)
I26
RXD3_0+ RXD3+ 66 RXD3_0– RXD3–
I27
RXD3_1+ DNC (Note 5) 67 RXD3_1– DNC (Note 5)
I28
CRS_DV3+ DNC (Note 5) 68 CRS_DV3– DNC (Note 5)
I29
/RESET (Note 4) DNC (Note 5) 69 DNC (Note 5) DNC (Note 5)
O 30 GND GND 70 GND GND
O31
TXD4_0+ TXD4+ 71 TXD4_0– TXD4–
O32
TXD4_1+ DNC (Note 5) 72 TXD4_1– DNC (Note 5)
O33
TXEN4+ DNC (Note 5) 73 TXEN4– DNC (Note 5)
I34
RXD4_0+ RXD4+ 74 RXD4_0– RXD4–
I35
RXD4_1+ DNC (Note 5) 75 RXD4_1– DNC (Note 5)
I36
CRS_DV4+ DNC (Note 5) 76 CRS_DV4– DNC (Note 5)
n/a 37
DNC (Note 5) DNC (Note 5) 77 DNC (Note 5) DNC (Note 5)
O 38 GND GND 78 GND GND
Note 6 39 MDIO (Note 6) MDIO (Note 6) 79 MDC (Note 6) MDC (Note 6)
O 40 3VCC 3VCC 80 3VCC 3VCC
1 SMII Output. Low for SMII, high for RMII. Disregard this signal for single mode DUTs.
2 BRDCON Input. Active low, DUT connected flag. It should be tied to ground at the DUT.
3 R_CLK+/– and R_SYNC+/–. These two LVDS input pairs should be the output of 65LVDS31 drivers on the DUT. These signals must be
supplied to LAN-3150A through J2.
4 RESET This low active output can be used as PHY hardware reset signal.
5 DNC Do not connect.
6 MDIO This signal is bi-directional.
MDC This is an output signal.
Table B-2. 80-Pin Connector Assignments (continued)
Signal Name Signal Name
I/O Pin RMII SMII Pin RMII SMII
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