ST STM32F31xx User Manual

DMA controller (DMA)
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interrupt.
 DMA2_IT_HT4 : DMA2 Channel4 half transfer interrupt.
 DMA2_IT_TE4 : DMA2 Channel4 transfer error
interrupt.
 DMA2_IT_GL5 : DMA2 Channel5 global interrupt.
 DMA2_IT_TC5 : DMA2 Channel5 transfer complete
interrupt.
 DMA2_IT_HT5 : DMA2 Channel5 half transfer interrupt.
 DMA2_IT_TE5 : DMA2 Channel5 transfer error
interrupt.
Return values
 The new state of DMAy_IT (SET or RESET).
Notes
 The Global interrupt (DMAy_FLAG_GLx) is set whenever any
of the other interrupts relative to the same channel is set
(Transfer Complete, Half-transfer Complete or Transfer Error
interrupts: DMAy_IT_TCx, DMAy_IT_HTx or DMAy_IT_TEx).
9.2.7.5 DMA_ClearITPendingBit
Function Name
void DMA_ClearITPendingBit ( uint32_t DMAy_IT)
Function Description
Clears the DMAy Channelx's interrupt pending bits.
Parameters
 DMAy_IT : specifies the DMAy interrupt pending bit to clear.
This parameter can be any combination (for the same DMA)
of the following values:
 DMA1_IT_GL1 : DMA1 Channel1 global interrupt.
 DMA1_IT_TC1 : DMA1 Channel1 transfer complete
interrupt.
 DMA1_IT_HT1 : DMA1 Channel1 half transfer interrupt.
 DMA1_IT_TE1 : DMA1 Channel1 transfer error
interrupt.
 DMA1_IT_GL2 : DMA1 Channel2 global interrupt.
 DMA1_IT_TC2 : DMA1 Channel2 transfer complete
interrupt.
 DMA1_IT_HT2 : DMA1 Channel2 half transfer interrupt.
 DMA1_IT_TE2 : DMA1 Channel2 transfer error
interrupt.
 DMA1_IT_GL3 : DMA1 Channel3 global interrupt.
 DMA1_IT_TC3 : DMA1 Channel3 transfer complete
interrupt.
 DMA1_IT_HT3 : DMA1 Channel3 half transfer interrupt.
 DMA1_IT_TE3 : DMA1 Channel3 transfer error
interrupt.
 DMA1_IT_GL4 : DMA1 Channel4 global interrupt.
 DMA1_IT_TC4 : DMA1 Channel4 transfer complete
interrupt.
 DMA1_IT_HT4 : DMA1 Channel4 half transfer interrupt.

ST STM32F31xx Specifications

General

Brand	ST
Model	STM32F31xx
Category	Microcontrollers
Language	English