188 XLi Time & Frequency System
XLi-man, Issue 8, 6/17/2008, Rev. H
SSSSSSSSSSSS SSSSSSSSSS SSSSSSS S SSS S SSSSS S
1
64 Kb/s Composite Clock Output (Aux Out 1)
2048 kHz Sine Outputs (Aux Out 2,3,4)
Synchronization
Configuration
Prior to installing the E1 card, set the user-configured jumper and DIP switch settings as needed. The
factory settings are as follows:
Figure 16:Jumper view of the E1 Output Card (87-6000E1-6) with S1 and JP1-7 circled.
Format As per ITU-T G.703 64 kBits/S Centralized Clock Interface. AMI with 5/8 duty
cycle. All 1's with Bipolar Violations at an 8 Kb/s rate.
Interface Balanced peak into 110 Ω, on wire wrap pins
Frequency 2048 kHz
Amplitude Balanced 1Vrms into 100 Ω
Connector wire wrap pins
Synchronization Phase locked to the clock’s internal 10 MHz
Accuracy
Refer to
“System Time & Frequency Accuracy” on page 6
CPU-Aware No
CE Compliant No
S1
JP4-JP7
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