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Xilinx KCU116 - Page 7

Xilinx KCU116
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KCU116 Board User Guide 7
UG1239 (v1.2) September 28, 2018 www.xilinx.com
Chapter1: Introduction
1 GB DDR4 component memory (two [256 Mb x 16] devices)
Two 256 Mb quad serial peripheral interface (QSPI) flash memory (dual Quad SPI)
USB JTAG interface via Digilent module with micro-B USB connector
Clock sources:
°
SI5335A quad clock generator
°
SI5328A programmable clock multiplier and jitter attenuator
°
Si570 I
2
C programmable LVDS clock generator
°
Subminiature version A (SMA) connectors (differential)
16 GTY transceivers (four Quads)
°
FMC HPC connector (four GTY transceivers)
°
8-lane PCI Express (eight GTY transceivers)
°
Four zSFP+ connectors (four GTY transceivers)
•PCIe
®
endpoint connectivity
°
Gen1 8-lane (x8)
°
Gen2 8-lane (x8)
°
Gen3 8-lane (x8)
Four zSFP+ connectors in a 1 high x 4 wide form-factor cage
Ethernet PHY SGMII interface with RJ-45 connector
Dual USB-to-UART bridge with micro-B USB connector
HDMI output codec with HDMI type-A connector
•I
2
C bus
•Status LEDs
•User I/O
Program_B pushbutton
•Pmod headers
VITA 57.1 FMC HPC connector J5
Power on/off slide switch SW1
Power management with PMBus voltage monitoring through Maxim power controllers
and GUI
Single 10-bit 0.2 MSPS ADC system monitor (SYSMON) analog-to-digital front end
Configuration options:
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