Abov MC96F6432S Series User Manual

229
MC96F6432S
ABOV Semiconductor Co., Ltd.
LCDCRL (LCD Driver Control Low Register): 99H
7
6
5
4
3
2
1
0
IRSEL
–
DBS3
DBS2
DBS1
DBS0
LCLK1
LCK0
R/W
–
R./W
R/W
R/W
R/W
R/W
R/W
Initial value: 00H
IRSEL
Internal LCD Bias Dividing Resistor Select
0
RLCD = 60kΩ (RLCD1)
1
RLCD = 120kΩ (RLCD2)
DBS[3:0]
LCD Duty and Bias Select (NOTE)
DBS3
DBS2
DBS1
DBS0
Description
0
0
0
0
1/8Duty, 1/4Bias, RLCD
0
0
0
1
1/6Duty, 1/4Bias, RLCD
0
0
1
0
1/5Duty, 1/3Bias, RLCD
0
0
1
1
1/4Duty, 1/3Bias, RLCD
0
1
0
0
1/3Duty, 1/3Bias, RLCD
0
1
0
1
1/3Duty, 1/2Bias, RLCD
0
1
1
0
1/3Duty, 1/2Bias, 2xRLCD
0
1
1
1
1/2Duty, 1/2Bias, RLCD
1
0
0
0
1/2Duty, 1/2Bias, 2xRLCD
Other values
Not available
LCLK[1:0]
LCD Clock Select (When f
WCK
(Watch timer clock)= 32.768kHz)
LCLK1
LCLK0
Description
0
0
f
LCD
= 128Hz
0
1
f
LCD
= 256Hz
1
0
f
LCD
= 512Hz
1
1
f
LCD
= 1024Hz
NOTE)
1. The LCD clock is generated by watch timer clock (f
WCK
). So the watch
timer should be enabled when the LCD display is turned on.
LCD Clock
Frequency (f
LCD
)
LCD Frame Frequency (f
FRAME
)
Unit
1/2 Duty
1/3 Duty
1/4 Duty
1/5 Duty
1/6 Duty
1/8 Duty
128
64
43
32
26
21
16
Hz
256
128
85
64
51
43
32
512
256
171
128
102
85
64
1024
512
341
256
205
171
128
Table 11.24 LCD Frame Frequency
The LCD frame frequency is calculated by the following formula:
LCD Frame Frequency (f
FRAME
) = f
LCD
× Duty Hz
Ex) In case of 1/4 duty and f
LCD
=512Hz, f
FRAME
= f
LCD
× 1/4 = 512 × 1/4 = 12Hz

Abov MC96F6432S Series Specifications

General

Brand	Abov
Model	MC96F6432S Series
Category	Microcontrollers
Language	English