A7 CPU Block Diagram: Interface
Reset Logic Puts the analyzer into a known state. A reset occurs at power-up and power-down (PVALID
from the A98 Power Supply assembly goes high), when the reset switch S2 (located on the
CPU assembly) is pressed, or when a RESET instruction is executed.
Agilent 35670A Circuit Descriptions
A7 CPU
8-27
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