Citizen CL-S400DT - Page 31

Chapter 2 Operating Principles
2-2. Operation of Control Parts
CL-S400DT 2-18
The voltage input at 6 (REFMON1) during photodetector conduction can vary with the
characteristics of a phototransistor to be used and with other factors. To solve this problem,
FPGA (U11) outputs RSNSCTL0 (pin N13) and RSENSCTL1 (pin N14) signals to turn ON/OFF
(connect/disconnect) R83 and R82 (voltage dividing resistors) to minimize the difference in
level at pin 6 (REFMON1).
The current control for the light emitter is done in the same way as for the transparent sensor
mentioned above. The CPU changes data (current flowing into the light emitter) to keep the
level at pin 6 (REFMON1) of the CPU constant.
3
1
2
J7
U4
D/A Converter
LD
DI
6
7
CK
8
2
SDATA
DACLD
SCLK
From
U1A CPU
BH2220
AO1
AO2
AO3
R89
R88
Q7
2SC5658
BSNSLED0
[SA Adjust Sensor U]
[SA Main PCB]
2
1
J8
+3.3V
TRAMON
5
R86
R85
R13
R14
TSNSCTL1
TSNSCTL0
R87
R81
U16B
-
+
5
6
7
C101
BA2904
Q4
DTC114EM
Q6
DTC114EM
B4-33
B4-34
U11
FPGA
ANI0
U1A
CPU
Transparent sensor
output sensing terminal
[SA Adjust Sensor L]
+3.3V
REFMON1
6
R83
R82
N14
N13
RSNSCTL1
RSNSCTL0
R84
R80
U16A
-
+
3
2
1
C100
BA2904
Q3
DTC114EM
Q5
DTC114EM
B3-38
B3-37
U11
FPGA
ANI1
U1A
CPU
Reflective Sensor
Transparent Sensor
Reflective sensor
output sensing terminal
Media