Citizen CL-S400DT - Head Control Circuit

Chapter 2 Operating Principles
2-2. Operation of Control Parts
2-21 CL-S400DT
(2) Head control circuit
The head control circuit controls the head driver incorporated in the “SA2 Head”.
During printing, pin P16 (HDVON) of FPGA (U11) goes to "High", and Q23 and Q21 turn ON.
Thus +24V is supplied to the “SA2 Head”.
The print data is sent from FPGA (U11) to the “SA2 Head” and thermal elements to be heated
are selected. The print data and control signals HD1, nHDSTB, nHDLAT and HDCLK (pins K15,
N16, P14 and N15) are sent from FPGA (U11).
According to the print data received, the “SA2 Head” heats the thermal elements, and dots are
printed on thermal transfer paper.
J4
10
nHDSTB
HDCLK
nHDLAT
14
1,2,15,16
U11
FPGA
nHCVON
B3-42
P15
D2
D1
+3.3V
U1A
CPU
R61
B3-26
K15
B3-41
P14
B3-39
N15
B3-40
N16
HD1
6,7,8,9
R70
L1
C71
VHD
Q1
DTA114EM
R60
+3.3V
nHDSTB
HDCLK
nHDLAT
HD1
B3-43
3,11
HDRES
ANI4
9
10
VHD
13
12
ANI5
VDD
[SA Main PCB]
SA2 Head
Head power supply monitoring
(not used)
D3
+3.3V
+3.3V
R62
R64
R63
C72
VHDMON
+3.3V
R69
Thermal element abnormality check
VHDON
P16
+24V
R123
R125
Q21
Q23
DTC114EM
2SJ661
R127
Head supply voltage ON/OFF
Thermal element abnormality check ON