evertz X1201S - All Input Signals Are Timed to Reference; Chapter 7: Video Timing Considerations; Video Timing Considerations

X1200 Series Router Manual
OUTPUT CONFIGURATIONS
Revision 1.3.2
Page 7-1
7. VIDEO TIMING CONSIDERATIONS
The following diagrams show how to set up the system timing under a number of different input signal
conditions so that SoftSwitch and Embedded SoftSwitch equipped routers can perform a clean switch
on the V1 buss.
7.1. ALL INPUT SIGNALS ARE TIMED TO REFERENCE.
This example shows the timing setup for a clean switch when all input signals are in time with the
reference. The V1 buss output will be delayed 1 line with respect to the reference. A clean switch is also
attainable on the V2 buss output.
SDI
SOURCE
01
SDI
Source
12
Fine Phase = 0
Course Phase = 1
Clean Switch = on
V1
V2
01
12
REF. Black
REF. Black
REF. Black
X1202 SS Router
1 Line Delay -
1 Line Delay -
SDI Signals Timed
to Ref. Black
SDI signal Held at
1 Line Delayed W.R.T.
Ref. Black
Input Dependant
CleanSwitch attainable
by setting
Switch Line = 10
Figure 7-1: Timing Example 1 – Inputs in Time with Reference