MC68332 CENTRAL PROCESSING UNIT
USER’S MANUAL 5-11
DBcc Dn, <label> 16 If condition false, then Dn – 1 ⇒ PC;
if Dn ∂ (– 1), then PC + d ⇒ PC
DIVS/DIVU <ea>, Dn 32/16 ⇒ 16: 16 Destination / Source ⇒ Destination
(signed or unsigned)
DIVSL/DIVUL <ea>, Dr : Dq
<ea>, Dq
<ea>, Dr : Dq
64/32 ⇒ 32 : 32
32/32 ⇒ 32
32/32 ⇒ 32 : 32
Destination / Source ⇒ Destination
(signed or unsigned)
EOR Dn, <ea> 8, 16, 32 Source x Destination ⇒ Destination
EORI #<data>, <ea> 8, 16, 32 Data x Destination ⇒ Destination
EORI to CCR #<data>, CCR 8 Source x CCR ⇒ CCR
EORI to SR
1
#<data>, SR 16 Source x SR ⇒ SR
EXG Rn, Rn 32 Rn ⇒ Rn
EXT Dn
Dn
8 ⇒ 16
16 ⇒ 32
Sign extended Destination ⇒ Destination
EXTB Dn 8 ⇒ 32 Sign extended Destination ⇒ Destination
ILLEGAL none none SSP – 2 ⇒ SSP; vector offset ⇒ (SSP);
SSP – 4 ⇒ SSP; PC ⇒ (SSP);
SSP – 2 ⇒ SSP; SR ⇒ (SSP);
illegal instruction vector address ⇒ PC
JMP Í none Destination ⇒ PC
JSR Í none SP – 4 ⇒ SP; PC ⇒ (SP); destination ⇒PC
LEA <ea>, An 32 <ea> ⇒ An
LINK An, #<d> 16, 32 SP – 4 ⇒ SP, An ⇒ (SP); SP ⇒ An, SP + d ⇒ SP
LPSTOP
1
#<data> none Data ⇒ SR; interrupt mask ⇒ EBI; STOP
LSL Dn, Dn
#<data>, Dn
Í
8, 16, 32
8, 16, 32
16
LSR Dn, Dn
#<data>, Dn
Í
8, 16, 32
8, 16, 32
16
MOVE <ea>, <ea> 8, 16, 32 Source ⇒ Destination
MOVEA <ea>, An 16, 32 ⇒ 32 Source ⇒ Destination
MOVEA
1
USP, An
An, USP
32
32
USP ⇒ An
An ⇒ USP
MOVE from CCR CCR, <ea> 16 CCR ⇒ Destination
MOVE to CCR <ea>, CCR 16 Source ⇒ CCR
MOVE from SR
1
SR, <ea> 16 SR ⇒ Destination
ROR Dn, Dn
#<data>, Dn
Í
8, 16, 32
8, 16, 32
16
ROXL Dn, Dn
#<data>, Dn
Í
8, 16, 32
8, 16, 32
16
ROXR Dn, Dn
#<data>, Dn
Í
8, 16, 32
8, 16, 32
16
RTD #<d> 16 (SP) ⇒ PC; SP + 4 + d ⇒ SP
RTE
1
none none (SP) ⇒ SR; SP + 2 ⇒ SP; (SP) ⇒ PC;
SP + 4 ⇒ SP;
restore stack according to format
Table 5-1 Instruction Set Summary
X/C 0
X/C
0
C
C X
CX
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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