MC68332
USER’S MANUAL
(Continued)
Paragraph Title Page
TABLE OF CONTENTS
4.5.6 External Bus Arbitration ........................................................................ 4-35
4.5.6.1 Slave (Factory Test) Mode Arbitration ......................................... 4-36
4.5.6.2 Show Cycles ................................................................................ 4-36
4.6 Reset ............................................................................................................ 4-37
4.6.1 Reset Exception Processing ................................................................ 4-37
4.6.2 Reset Control Logic .............................................................................. 4-38
4.6.3 Reset Mode Selection .......................................................................... 4-38
4.6.3.1 Data Bus Mode Selection ............................................................. 4-39
4.6.3.2 Clock Mode Selection .................................................................. 4-41
4.6.3.3 Breakpoint Mode Selection .......................................................... 4-41
4.6.4 MCU Module Pin Function During Reset ............................................. 4-41
4.6.5 Pin State During Reset ......................................................................... 4-42
4.6.5.1 Reset States of SIM Pins ............................................................. 4-42
4.6.5.2 Reset States of Pins Assigned to Other MCU Modules ............... 4-43
4.6.6 Reset Timing ........................................................................................ 4-43
4.6.7 Power-On Reset ................................................................................... 4-44
4.6.8 Reset Processing Summary ................................................................. 4-45
4.6.9 Reset Status Register .......................................................................... 4-46
4.7 Interrupts ...................................................................................................... 4-46
4.7.1 Interrupt Exception Processing ............................................................ 4-46
4.7.2 Interrupt Priority and Recognition ......................................................... 4-46
4.7.3 Interrupt Acknowledge and Arbitration ................................................. 4-47
4.7.4 Interrupt Processing Summary ............................................................. 4-48
4.7.5 Interrupt Acknowledge Bus Cycles ....................................................... 4-49
4.8 Chip Selects ................................................................................................. 4-49
4.8.1 Chip-Select Registers ........................................................................... 4-51
4.8.1.1 Chip-Select Pin Assignment Registers ........................................ 4-52
4.8.1.2 Chip-Select Base Address Registers ........................................... 4-53
4.8.1.3 Chip-Select Option Registers ....................................................... 4-53
4.8.1.4 PORTC Data Register .................................................................. 4-55
4.8.2 Chip-Select Operation .......................................................................... 4-55
4.8.3 Using Chip-Select Signals for Interrupt Acknowledge .......................... 4-55
4.8.4 Chip-Select Reset Operation ................................................................ 4-56
4.9 Parallel Input/Output Ports ........................................................................... 4-58
4.9.1 Pin Assignment Registers .................................................................... 4-58
4.9.2 Data Direction Registers ...................................................................... 4-58
4.9.3 Data Registers ...................................................................................... 4-58
4.10 Factory Test ................................................................................................. 4-58
SECTION 5 CENTRAL PROCESSING UNIT
5.1 General ........................................................................................................... 5-1
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Freescale Semiconductor, Inc.
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