Freescale Semiconductor MC68332 - Page 7

MC68332
USER’S MANUAL
(Continued)
Paragraph Title Page
TABLE OF CONTENTS
5.2 CPU32 Registers ............................................................................................ 5-2
5.2.1 Data Registers ........................................................................................ 5-3
5.2.2 Address Registers .................................................................................. 5-5
5.2.3 Program Counter .................................................................................... 5-5
5.2.4 Control Registers .................................................................................... 5-5
5.2.4.1 Status Register ............................................................................... 5-5
5.2.4.2 Alternate Function Code Registers ................................................ 5-6
5.2.5 Vector Base Register (VBR) ................................................................... 5-6
5.3 Memory Organization ..................................................................................... 5-6
5.4 Virtual Memory ............................................................................................... 5-8
5.5 Addressing Modes .......................................................................................... 5-8
5.6 Processing States .......................................................................................... 5-8
5.7 Privilege Levels .............................................................................................. 5-9
5.8 Instructions ..................................................................................................... 5-9
5.8.1 M68000 Family Compatibility ............................................................... 5-12
5.8.2 Special Control Instructions .................................................................. 5-13
5.8.2.1 Low Power Stop (LPSTOP) ......................................................... 5-13
5.8.2.2 Table Lookup and Interpolate (TBL) ............................................ 5-13
5.9 Exception Processing ................................................................................... 5-13
5.9.1 Exception Vectors ................................................................................ 5-13
5.9.2 Types of Exceptions ............................................................................. 5-14
5.9.3 Exception Processing Sequence .......................................................... 5-15
5.10 Development Support ................................................................................... 5-15
5.10.1 M68000 Family Development Support ................................................. 5-15
5.10.2 Background Debugging Mode .............................................................. 5-16
5.10.2.1 Enabling BDM .............................................................................. 5-17
5.10.2.2 BDM Sources ............................................................................... 5-17
5.10.2.3 Entering BDM ............................................................................... 5-18
5.10.2.4 BDM Commands .......................................................................... 5-19
5.10.2.5 Background Mode Registers ........................................................ 5-20
5.10.2.6 Returning from BDM .................................................................... 5-20
5.10.2.7 Serial Interface ............................................................................. 5-20
5.10.3 Recommended BDM Connection ......................................................... 5-22
5.10.4 Deterministic Opcode Tracking ............................................................ 5-22
5.10.5 On-Chip Breakpoint Hardware ............................................................. 5-23
5.11 Loop Mode Instruction Execution ................................................................. 5-23
SECTION 6QUEUED SERIAL MODULE
6.1 General ........................................................................................................... 6-1
6.2 QSM Registers and Address Map .................................................................. 6-2
6.2.1 QSM Global Registers ........................................................................... 6-2
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