Freescale Semiconductor MC68332 - Page 8

MC68332
USER’S MANUAL
(Continued)
Paragraph Title Page
TABLE OF CONTENTS
6.2.1.1 Low-Power Stop Operation ........................................................... 6-2
6.2.1.2 Freeze Operation .......................................................................... 6-3
6.2.1.3 QSM Interrupts .............................................................................. 6-3
6.2.2 QSM Pin Control Registers ................................................................... 6-3
6.3 Queued Serial Peripheral Interface ................................................................ 6-4
6.3.1 QSPI Registers ...................................................................................... 6-6
6.3.1.1 Control Registers ........................................................................... 6-7
6.3.1.2 Status Register .............................................................................. 6-7
6.3.2 QSPI RAM ............................................................................................. 6-7
6.3.2.1 Receive RAM ................................................................................. 6-7
6.3.2.2 Transmit RAM ................................................................................ 6-8
6.3.2.3 Command RAM ............................................................................. 6-8
6.3.3 QSPI Pins ............................................................................................... 6-8
6.3.4 QSPI Operation ...................................................................................... 6-9
6.3.5 QSPI Operating Modes ........................................................................ 6-10
6.3.5.1 Master Mode ................................................................................ 6-17
6.3.5.2 Master Wraparound Mode ........................................................... 6-20
6.3.5.3 Slave Mode .................................................................................. 6-20
6.3.5.4 Slave Wraparound Mode ............................................................. 6-22
6.3.6 Peripheral Chip Selects ........................................................................ 6-22
6.4 Serial Communication Interface ................................................................... 6-22
6.4.1 SCI Registers ....................................................................................... 6-22
6.4.1.1 Control Registers ......................................................................... 6-22
6.4.1.2 Status Register ............................................................................. 6-25
6.4.1.3 Data Register ............................................................................... 6-25
6.4.2 SCI Pins .............................................................................................. 6-25
6.4.3 SCI Operation ....................................................................................... 6-25
6.4.3.1 Definition of Terms ....................................................................... 6-25
6.4.3.2 Serial Formats .............................................................................. 6-26
6.4.3.3 Baud Clock ................................................................................... 6-26
6.4.3.4 Parity Checking ............................................................................ 6-27
6.4.3.5 Transmitter Operation .................................................................. 6-27
6.4.3.6 Receiver Operation ...................................................................... 6-28
6.4.3.7 Idle-Line Detection ....................................................................... 6-29
6.4.3.8 Receiver Wakeup ......................................................................... 6-30
6.4.3.9 Internal Loop ................................................................................ 6-30
6.5 QSM Initialization ......................................................................................... 6-31
SECTION 7TIME PROCESSOR UNIT
7.1 General ........................................................................................................... 7-1
7.2 TPU Components ........................................................................................... 7-2
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