IDEC MICROSmart FC6A Series Ladder Programming Manual

FC6A S ERIES MICROS MART L ADDER P ROGRAMMING M ANUAL FC9Y-B1726 A-3
A PPENDIX
RNDM D, D→D 6.84 3.42
ANDW, ORW, XORW (W)
M · M→D 6.08 3.04
D · D→D6.23.1
ANDW, ORW, XORW (D) D · D→D 21.6 10.8
SFTL, SFTR N_B=100 14.10 7.05
BCDLS D→D, S1=1 10.36 5.18
WSFT D→D 15.6 + 1.4n 7.8 + 0.7n
ROTL, ROTR (W) D, bits=1 9.1 4.6
HTOB (W) D→D 4.94 2.47
BTOH (W) D→D 4.94 2.47
HTOA (W) D→D7.203.6
ATOH (W) D→D 5.48 + 0.88n 2.74 + 0.44n
BTOA (W) D→D 5.88 + 0.72n 2.94 + 0.36n
ATOB (W) D→D 5.84 + 0.76n 2.92 + 0.38n
ENCO (W) M→D, bits=16 3.9 + 0.8n 1.95 + 0.4n
DECO D→M9.64.8
BCNT M→D, bits=16 ――
ALT ― 8.00 4.00
CVDT
W, I →F 10.2 5.1
D, L→F 15.3 7.7
F→W, I 10.3 5.2
F→D, L 15.5 7.3
DTDV D→D4.782.39
DTCB D→D 4.96 2.48
SWAP (W) ― 4.46 2.23
SWAP (D) ― 14.9 7.5
WKTIM ―― ―
WKTBL ―― ―
WEEK ―― ―
YEAR ―― ―
MSG ―― ―
DISP ―― ―
DGRD ―― ―
LABEL ―― ―
LJMP ―― ―
LCAL ―― ―
LRET ―― ―
DJNZ ―― ―
IOREF ― 9.48 4.74
HSCRF ― 8.32 4.16
FRQRF ―― ―
COMRF ―― ―
DI ― 7.44 3.72
EI ― 2.07 1.04
XYFS ―― ―
CVXTY ―― ―
CVYTX ―― ―
AVRG (W, I) S3=10 7.76 3.88
AVRG (D, L) S3=10 13.5 6.8
AVRG (F) S3=10 14.4 7.2
PULS ―― ―
PWM ―― ―
RAMP ―― ―
RAMPL ―― ―
Instruction Device and Condition
Execution Time (μs)
All-in-One CPU Module/
CAN J1939 All-in-One CPU
Module
Plus CPU Module

IDEC MICROSmart FC6A Series Specifications

General

Brand	IDEC
Model	MICROSmart FC6A Series
Category	Computer Hardware
Language	English