Table 9. Intel Agilex Avalon Streaming Interface ×8 Configuration Scheme—Dedicated Configuration Pins
Pin Function SDM I/O Direction I/O Standard Schmitt
Trigger/TTL
Input
Weak Pull-Up/
Pull-Down
Drive
Strength
Open Drain Slew
Rate
AVSTx8_DATA2 SDM_IO1
Input 1.8 V LVCMOS Schmitt Trigger Disable — — —
AVSTx8_DATA0 SDM_IO2
Input 1.8 V LVCMOS Schmitt Trigger Disable — — —
AVSTx8_DATA3 SDM_IO3
Input 1.8 V LVCMOS Schmitt Trigger Disable — — —
AVSTx8_DATA1 SDM_IO4
Input 1.8 V LVCMOS Schmitt Trigger Disable — — —
AVSTx8_DATA4 SDM_IO6
Input 1.8 V LVCMOS Schmitt Trigger Disable — — —
AVSTx8_READY SDM_IO8
Output 1.8 V LVCMOS — — 8 mA Disable Fast
AVSTx8_DATA7 SDM_IO10
Input 1.8 V LVCMOS Schmitt Trigger Disable — — —
AVSTx8_VALID SDM_IO11
Input 1.8 V LVCMOS Schmitt Trigger Weak pull-down
with 20 kΩ
resistor
— — —
AVSTx8_DATA5 SDM_IO13
Input 1.8 V LVCMOS Schmitt Trigger Disable — — —
AVSTx8_CLK SDM_IO14
Input 1.8 V LVCMOS Schmitt Trigger Disable — — —
AVSTx8_DATA6 SDM_IO15
Input 1.8 V LVCMOS Schmitt Trigger Disable — — —
Table 10. Intel Agilex Avalon Streaming Interface ×8 Configuration Scheme—Unused Configuration Pins
For the unused configuration pins, the drive strength, open drain, and slew rate settings are not applicable.
SDM I/O
Direction I/O Standard Schmitt Trigger/TTL Input Weak Pull-Up/Pull-Down
SDM_IO0
Input 1.8 V LVCMOS Schmitt Trigger Weak pull-down with 20 kΩ resistor
SDM_IO5
Input 1.8 V LVCMOS Schmitt Trigger Weak pull-up with 20 kΩ resistor
SDM_IO7
Input 1.8 V LVCMOS Schmitt Trigger Weak pull-up with 20 kΩ resistor
SDM_IO9
Input 1.8 V LVCMOS Schmitt Trigger Weak pull-up with 20 kΩ resistor
SDM_IO12
Input 1.8 V LVCMOS Schmitt Trigger Weak pull-up with 20 kΩ resistor
SDM_IO16
Input 1.8 V LVCMOS Schmitt Trigger Weak pull-down with 20 kΩ resistor
2. Intel Agilex Configuration Details
683673 | 2021.10.29
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