Mitsubishi FX1N Series Programming Manual

FX Series Programmable Controlers Applied Instructions 5
5-47
5.4.5 SFTR (FNC 34)
Operation:
The instruction copies n
2 source devices to a bit
stack of length n
1. For every new addition of n2 bits,
the existing data within the bit stack is shifted n
2 bits
to the right. Any bit data moving to a position
exceeding the n
1 limit is diverted to an overflow area.
The bit shifting operation will occur every time the
instruction is processed unless it is modified with
either the pulse suffix or a controlled interlock.
Mnemonic Function
Operands
Program steps
SDn
1 n2
SFTR
FNC 34
(
Bit shift right)

The status of the
source devices are
copied to a
controlled bit stack
moving the existing
data to the right
X,Y,M,S Y,M,S K,H,
)
Note:
FX users:
n
2 ≤ n1 ≤ 1024
FX0,FX0N users:
n2 ≤ n1 ≤ 512
SFTR,SFTRP:
9steps
FX 1S
FX 1N FX 2N
FX 2NC
PULSE-P 16 BIT OPERATION 32 BIT OPERATION
X6
SFTR
X 0
M 0
K 16
K 4
[S] [D] [n1] [n2]
X3 X2 X1 X0
M15 M14 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0

Mitsubishi FX1N Series Specifications

General

Programming Language	Ladder Logic
Output Type	Relay, Transistor
Operating Temperature	0 to 55°C
Power Supply	100-240V AC or 24V DC
Program Capacity	8K steps
Communication Ports	RS-422
Data Memory	8000 words
High-speed Counters	Up to 6 channels
Expansion Modules	Available
Pulse Output	2 points