2.3.1
Digital Section
The digital section is based on a Dual Core System On a Chip (SoC) processor. The Dual Core
Processor SoC is a low-power applications processor with dual core architecture.
The dual core architecture is based on the following cores:
• Advanced RISC Machine (ARM) application core
• Digital Signal Processor (DSP) core with floating point
The dual-core architecture of the Dual Core Processor SoC provides benefits of both DSP and
Reduced Instruction Set Computing (RISC) technologies.
The DSP performs modulation and de-modulation functions for the radio. It also performs Forward
Error Correction and other correction algorithms for overcoming channel errors and Algebraic Code
Excited Linear Prediction (ACELP) speech coding.
The DSP carries out the following functions:
• Linear 16-bit analog to digital conversions
• Audio filtering
• Level amplification for the microphone audio input and the received audio output
The power and audio section is based on the Power Management IC and includes power supplies,
audio routing, microphone, and earpiece amplifiers. An external audio power amplifier is used for the
loudspeaker.
2.3.2
Transmitter Path
The transmitter circuitry includes a linear class AB Power Amplifier (PA) for the linear modulation of the
terminal. It includes a Cartesian Loop to enhance its transmitter linearity and reduce splattering power
into adjacent channels.
The transmitter path consists of a Cartesian Loop that contains forward and feedback paths. The
forward path includes the following items.
• Tx Power Control Integrated Circuit
• Balanced-Unbalanced Converter (BALUN)
• Forward Attenuator
• Power Amplifier
• Directional Coupler
• Antenna Switch
The loop feedback path includes the following items.
• Tx Power Control Integrated Circuit
• BALUN
• Feedback Attenuator
• Directional Coupler
MN006362A01-AL
Chapter 2 : Overview
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