NXP Semiconductors MPC5746R - Page 70

Table 41. DSPI CMOS master modified timing (full duplex and output only) - MTFE = 1,
CPHA = 0 or 1 (continued)
# Symbol Characteristic Condition Value
1
Unit
Pad drive
2
Load (C
L
) Min Max
Medium 50 pF 200.0 —
2 t
CSC
PCS to SCK delay SCK and PCS drive strength
Very strong 25 pF (N
3
x t
SYS
, 4
) - 16 — ns
Strong 50 pF (N
3
x t
SYS
, 4
) - 16 —
Medium 50 pF (N
3
x t
SYS
, 4
) - 16 —
PCS medium and
SCK strong
PCS = 50 pF
SCK = 50 pF
(N
3
x t
SYS
, 4
) - 29 —
3 t
ASC
After SCK delay SCK and PCS drive strength
Very strong PCS = 0 pF
SCK = 50 pF
(M
5
x t
SYS
4
) - 35 — ns
Strong PCS = 0 pF
SCK = 50 pF
(M
5
x t
SYS
, 4
) - 35 —
Medium PCS = 0 pF
SCK = 50 pF
(M
5
x t
SYS
, 4
) - 35 —
PCS medium and
SCK strong
PCS = 0 pF
SCK = 50 pF
(M
5
x t
SYS
, 4
) - 35 —
4 t
SDC
SCK duty cycle
6
SCK drive strength
Very strong 0 to 50 pF
1
/
2
t
SCK
- 2
1
/
2
t
SCK
+ 2 ns
Strong 0 to 50 pF
1
/
2
t
SCK
- 2
1
/
2
t
SCK
+ 2
Medium 0 to 50 pF
1
/
2
t
SCK
- 5
1
/
2
t
SCK
+ 5
PCS strobe timing
5 t
PCSC
PCSx to PCSS time
,
7
PCS and PCSS drive strength
Strong 25 pF 13.0 — ns
6 t
PASC
PCSS to PCSx time
7
PCS and PCSS drive strength
Strong 25 pF 13.0 — ns
SIN setup time
7 t
SUI
SIN setup time to
SCK
CPHA = 0
8
SCK drive strength
Very strong 25 pF 25 - (P
9
x t
SYS
4
) — ns
Strong 50 pF 31 - (P
9
x t
SYS
, 4
) —
Medium 50 pF 52 - (P
9
x t
SYS
, 4
) —
SIN setup time to
SCK
CPHA = 1
8
SCK drive strength
Very strong 25 pF 25.0 — ns
Strong 50 pF 31.0 —
Medium 50 pF 52.0 —
SIN hold time
8 t
HI
SIN hold time from
SCK
SCK drive strength
Very strong 0 pF -1 + (P
8
x t
SYS
, 3
) — ns
Table continues on the next page...
AC specifications
SPC5746R Microcontroller Data Sheet, Rev. 6, 06/2017
70 NXP Semiconductors