3.45.3 Diagram
Bits
7 6 5 4 3 2 1 0
R DDRCLK
SYSCLK
W
RRST 00 00 00 00
3.45.4 Fields
Field Function
7-6
-
Reserved.
5-4
DDRCLK
DDRCLK Frequency Selection:
00= 100.00 MHz (fixed)
All other values are reserved.
3-2
-
Reserved.
1-0
SYSCLK
SYSCLK Frequency Selection:
00= 100.00 MHz (fixed)
All other values are reserved.
3.46 Board Configuration 2 (BRDCFG2)
3.46.1 Address
Register Offset
BRDCFG2 052h
Board Configuration 2 (BRDCFG2)
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 0, 09/2018
110 NXP Semiconductors