NXP Semiconductors QorIQ LX2160A - 3.48 Board Configuration 4 (BRDCFG4)

3.47.2 Function
The BRDCFG3 register reports SerDes clock speeds for SerDes block 3. PCIe clocks
may be fixed or spread-spectrum enabled, as selected by BRDCFG4.SPREAD.
3.47.3 Diagram
Bits
7 6 5 4 3 2 1 0
R SD3CK1 SD3CK2
W
RRST 00 00 0000
3.47.4 Fields
Field Function
7-6
SD3CK1
SerDes3 Clock #1 (F) Rate:
00= 100.0000000 MHz (fixed)
5-4
SD3CK2
SerDes3 Clock #2 (S) Rate:
00= 100.0000000 MHz (fixed)
3-0
-
Reserved.
3.48 Board Configuration 4 (BRDCFG4)
3.48.1 Address
Register Offset
BRDCFG4 054h
3.48.2 Function
The BRDCFG4 register controls general board configuration.
Board Configuration 4 (BRDCFG4)
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 0, 09/2018
112 NXP Semiconductors