3.1 Register Conventions
An undefined register address does not have any defined register value. Reads and writes
to such addresses should be avoided. If you attempt to read such addresses, undefined
data is returned. Undefined register addresses may be defined in the future.
For registers which do not define all bits, reserved bits behave as follows:
3.1.1 Reserved Bits
Register Recommended Actions
DUTCFG Read as 1. Write ones to unused bits.
others Read as 0. Write zeroes to unused bits.
Future definitions of reserved bits will maintain backward compatibility with the above
rules.
3.2 Resets
The reset values for registers are defined as follows:
3.2.1 Reset Actions
Term Reset Action
NONE Register cannot be reset. Applies to read-only registers.
ARST Auxiliary Reset: registers are reset when the system powers up with standby power, and is never altered
by hardware again. Software writes are preserved.
CRST Control Reset: registers are not reset except under exceptional situations, such as power cycles or
watchdog timeout.
RRST Reconfig Reset: configuration registers are reset as with CRST unless a reconfiguration reset has been
requested.
GRST General Reset: always reset, for any reason.
Generally, a register is wholly affected by only one reset source, however there are
exceptions and these are shown with separate reset lines for each reset source.
Chapter 3 Qixis Programming Model
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 0, 09/2018
NXP Semiconductors 67
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