NXP Semiconductors QorIQ LX2160A - 3.19 SFP CSR 1 (SFP1)

Field Function
-
3
WDEN
Watchdog Enable:
0= The watchdog is not enabled during reconfiguration.
1= The watchdog is enabled during reconfiguration. If not disabled within 2^29 clock cycles (> 8 minutes),
the system is reset.
NOTE: This is not a highly-secure watchdog; software can reset this bit at any time and disable the
watchdog.
2-1
-
Reserved.
0
GO
Reconfiguration Start:
0= Reconfiguration sequencer is idle.
1= On the 0-to-1 transition, the reconfiguration process begins.
3.19 SFP CSR 1 (SFP1)
3.19.1 Address
Register Offset
SFP1 018h
3.19.2 Function
The SFP1 register controls and monitors the zQSFP+ cage used with the 40GE PHY
(40G MAC2).
3.19.3 Diagram
Bits
7 6 5 4 3 2 1 0
R PRS
LPMODE SEL
W PRS
CRST 1 000 00 0 0
Chapter 3 Qixis Programming Model
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 0, 09/2018
NXP Semiconductors 83