3.51.4 Fields
Field Function
7-0
-
Reserved.
3.52 DUT Configuration 2 (DUTCFG2)
3.52.1 Address
Register Offset
DUTCFG2 062h
3.52.2 Function
The DUTCFG2 register manages processor device selection (SVR) and internal-only
device test features.
3.52.3 Diagram
Bits
7 6 5 4 3 2 1 0
R
SVR10 TEST
W
RRST
11111 SW_SVR 1
3.52.4 Fields
Field Function
7-3 Reserved.
Table continues on the next page...
DUT Configuration 2 (DUTCFG2)
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 0, 09/2018
116 NXP Semiconductors