2.5 Ethernet controller interface
The LX2160A processor supports two Ethernet controllers, EC1 and EC2, supporting the
RGMII protocol. On the LX2160ARDB, each Ethernet controller is connected to a 1 GbE
RGMII Ethernet PHY (Qualcomm AR8035), which is connected to an RJ45 jack coupled
with magnetics. The two RJ45 jacks are stacked on the board such that jack for EC1 is at
the bottom and jack for EC2 is at the top.
The figure below shows the architecture of the Ethernet controller interface.
EC1_TXD[3:0]
EC1_TX_EN
EC1_RX_DV
EC1_RXD[3:0]
EC1_RX_CLK
EC1_GTX_CLK
LX2160A
CFG_MUX_EC2
Qualcomm
AR8035
PHY #1
MagJackMagJack
Qualcomm
AR8035
PHY #2
MagJackMagJack
HS
Mux
HS
Mux
EC2_TXD[3:0]
EC2_TX_EN
EC2_RX_DV
EC2_RXD[3:0]
EC2_RX_CLK
EC2_GTX_CLK
EC_GTX_CLK125
EC_CLK125
from CLKGEN
from CPLD
IEEE
1588
Header
RST_GEN_OVDD_B
from CPLD
RST_PHY1_B
RST_PHY2_B
from CPLD
from CPLD
Figure 2-11. Ethernet controller architecture
Ethernet controller interface
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 0, 09/2018
34 NXP Semiconductors