• Interrupt management
• System alert monitoring and status display
• Remapping of system boot devices
• Handling of board control and status registers
The following two figures show the system controller architectural details.
ADM6711
SW_PWR_B
JTAG_RST_B
DUT_RESET_REQ_B
DUT_HRESET_B
DUT_PORESET_B
DUT_TRST_B
Power enable
PS_VDD_EN
PS_GVDD_EN
PS_VTT[1:2]_EN
PS_VPP_EN
PS_SD_VDD_EN
PS_SD_AVDD_EN
PS_OVDD_EN
PS_2VX_EN
PS_0V85_EN
PS_LVAUX_EN
PS_USB_SVDD_EN
PS_USB_HVDD_EN
Power good
PS_VDD_PG
PS_GVDD_PG
PS_VTT[1:2]_PG_B
PS_VPP_PG
PS_SD_VDD_PG_B
PS_SD_AVDD_PG
PS_OVDD_PG
PS_2VX_PG_B
PS_0V85_PG
PS_LVAUX_PG_B
PS_USB_SVDD_PG
PS_TA_BB_VDD_PG_B
to LX2160A
Push
button
Push
button
ADM6711
SW_RST_B
JTAG
header
PS_SD_SVDD_SEL
ATX_ON_B
ATX_PWRGD
to ATX PSU
to power
supplies
from power
supplies
PS_PRELOAD_ON
1V8_SB
3V3_SB
from JTAG
CPLD_PROG_TDI
CPLD_PROG_TDO
CPLD_PROG_TCK
CPLD_PROG_TMS
HOT_CLK
25 MHz
3.3V LVCMOS
25 MHz
OSC
HOT_RST_B
10K
10uF
3V3_SB
PS_SD_OVDD_SEL
PS_SD_AVDD_SEL
PS_EVDD_SEL
Reset drive
RST_MEM[1:2]_B
RST_SLOT[1:2]_B
RST_PHY_40GE_B
RST_PHY_25G_B
RST_PHY_10G_B
RST_QSFP_B
RST_EPHY[1:2]_B
RST_CLKGEN_B
RST_EMMC_B
RST_XSPI_B
RST_I2CMUX_B
to system
devices
3x
PCB_REV[2:0]
000 = “Rev A”
001 = “Rev B”
...
Selectively DNP
resistors to
encode PCB rev
CPLD
Altera
EPM2210F256C5N
BGA256
TDI
TDO
TMS
TCK
Figure 2-27. System controller architecture
Chapter 2 LX2160ARDB Functional Description
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 0, 09/2018
NXP Semiconductors 59
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