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Sony MAP-S1 - IC Pin Function Descriptions Continued; Main Board IC Pinout Details (Pins 56-114)

Sony MAP-S1
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MAP-S1
83
Pin No. Pin Name I/O Description
56 KEY_WAKEUP I Power key input terminal
57
USB_OVER_
CURRENT
I USB VBUS power over current detection signal input terminal
58 D1.18V_SOC - Power supply terminal (+1.18V)
59
CDM_UNLOAD_
END_SW
I Unloading end detection switch input terminal
60 CDM_LOAD_SW I Loading detection switch input terminal
61 DGND - Ground terminal
62 D3.3V_SOC - Power supply terminal (+3.3V)
63, 64
MD_BOOT0,
MD_BOOT1
- Not used
65 MD_CLK - Not used
66 MD_CLKS - Not used
67 RTC_X1 I System clock input terminal (32.768 kHz)
68 RTC_X2 O System clock output terminal (32.768 kHz)
69 D1.18V_SOC - Power supply terminal (+1.18V)
70 EXTAL I System clock input terminal (13.333 MHz)
71 XTAL O System clock output terminal (13.333 MHz)
72, 73 DGND - Ground terminal
74 NMI - Non-maskable interrupt signal input terminal Not used
75 DGND - Ground terminal
76 RESET_CP I
System reset signal input from the reset signal generator “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it change to “H”
77 D3.3V_SOC - Power supply terminal (+3.3V)
78 WiFi_CH I WiFi channel selection signal input terminal “L”: 113 ch, “H”: 111 ch
79 AC_DET I AC detection signal input terminal
80 DEST_IN I Destination setting terminal
81 TEMP I Temperature detection signal input terminal
82 JOG_FUNCTION I
Jog dial pulse input from the rotary encoder (for – TUNING + .>)
83 JOG_VOLUME I Jog dial pulse input from the rotary encoder (for VOL)
84 KEY_IN1 I Eject and PUSH ENTER keys input terminal
85 KEY_IN2 I Front panel keys input terminal
86 A3.3V_SOC - Power supply terminal (+3.3V)
87 DGND - Ground terminal
88 A3.3V_SOC - Power supply terminal (+3.3V)
89 BSCANP - Not used
90 D3.3V_SOC - Power supply terminal (+3.3V)
91 AUDIO_X1 I System clock input terminal
92 AUDIO_X2 O System clock output terminal Not used
93 DGND - Ground terminal
94 HP_DET I Headphone insert detection signal input terminal “L”: headphone is inserted
95 D1.18V_SOC - Power supply terminal (+1.18V)
96 HP_MUTE O Not used
97 TRST I Test reset signal input terminal (for JTAG)
98 TDO O Test data output terminal (for JTAG)
99 TDI I Test data input terminal (for JTAG)
100 TMS I Test mode selection signal input terminal (for JTAG)
101 TCK I Test clock signal input terminal (for JTAG)
102 DGND - Ground terminal
103 NFC_SW O Standby control signal output to the NFC module
104 NFC_IRQ I Interrupt request signal input from the NFC module
105 D1.18V_SOC - Power supply terminal (+1.18V)
106 Reserve O Not used
107 DGND - Ground terminal
108 NFC_SPI_CLK O Serial data transfer clock signal output to the NFC module
109 D3.3V_SOC - Power supply terminal (+3.3V)
110 NFC_DATA O Serial data output to the NFC module
111 NFC_SEL O Data read/write control signal output to the NFC module
112, 113 Reserve O Not used
114 EVOL_DATA O Serial data output to the electrical volume

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