Sony STR-DA2800ES - Page 154

STR-DA2800ES
154
NETWORK BOARD IC101 CXD9998G-CB (AUDIO/VIDEO SIGNAL DECODER)
Pin No. Pin Name I/O Description
A2 TXVP_0 O Transmit data (positive) output terminal Not used
A4 TXVN_1 I Receive data (negative) input terminal Not used
A5 TANA_0 - Ethernet analog test terminal
A6 to A8 RX2B to RX0B I TMDS data (negative) input terminal Not used
A9 RXCKB I TMDS clock (negative) signal input terminal Not used
A12 AOBCK O
Bit clock signal output to the D/A converter (for network audio section) and digital audio inter-
face receiver
A13 NS_XTALI O System clock signal output terminal (27 MHz)
A14 to
A16
CH2_M to CH0_M O TMDS data (negative) output to the HDMI input selector
A17 CLK_M O TMDS clock (negative) signal output to the HDMI input selector
A18 EXT_CAP - External capacitor connection terminal Not used
A19 VDACG_OUT O Component video signal output to the video amplifi er
A21, A22 VDIN26, VDIN24 I/O Not used
A24 VDIN15 I/O Not used
A25 VDIN13 O Data selection signal output terminal
A26 to
A28
VDIN11, VDIN9,
VDIN7
I/O Not used
B3 TXVN_0 I Receive data (positive) input terminal Not used
B4 TXVP_1 O Transmit data (negative) output terminal Not used
B5 TANA_1 - Ethernet analog test terminal
B6 to B8 RX2 to RX0 I TMDS data (positive) input terminal Not used
B9 RXCK I TMDS clock (positive) signal input terminal Not used
B10 SCL O I2C serial data transfer clock signal output to the real time clock and IR controller
B12 AOLRCK O
L/R sampling clock signal output to the D/A converter (for network audio section) and digital
audio interface receiver
B13 NS_XTALO I System clock signal input terminal (27 MHz)
B14 to
B16
CH2_P to CH0_P O TMDS data (positive) output to the HDMI input selector
B17 CLK_P O TMDS clock (positive) signal output to the HDMI input selector
B18 EXT_RES - External resistor connection terminal
B19 VDACB_OUT O Component video signal output to the video amplifi er
B21, B22 VDIN27, VDIN25 I/O Not used
B23 VDIN16 I/O Not used
B24 VDIN14 O Reset signal output to the IR controller “L”: reset
B26 to
B28
VDIN12, VDIN8,
VDIN5
I/O Not used
C1 FOIN I Not used
C2 FOIP I Not used
C4 AVSS33_LD - Ground terminal
C5 AVDD33_COM - Power supply terminal (+3.3V)
C7, C8 VDD33_HDMI_RX - Power supply terminal (+3.3V)
C10 SDA I/O Two-way I2C serial data bus with the real time clock and IR controller
C11 AOSDATA0 O Audio signal output to the digital audio interface receiver
C12 AOMCLK O
Master clock signal output to the D/A converter (for network audio section) and digital audio
interface receiver
C14 TP_PLLG - Test terminal
C15 AVDD33_XTAL - Power supply terminal (+3.3V)
C17 AVDD33_HDMI_TX - Power supply terminal (+3.3V)
C18 VDACR_OUT O Component video signal output to the video amplifi er
C19 VDACX_OUT O Composite video signal output to the video amplifi er
C20 VDIN29 I/O Not used
C21 VDIN31 I/O Two-way I2C serial data bus with the EEPROM
C22, C23 VDIN20, VDIN18 I/O Not used
C24 CEC I/O HDMI CEC data input/output terminal Not used
C25 HDMISCK O I2C serial data transfer clock signal output to the HDMI input selector
C26 to
C28
VDIN10, VDIN4,
VDIN3
I/O Not used
D1 FPDOCD I Laser power monitor signal input terminal Not used
D3 RSTI I Reset signal input terminal Not used