ST STM32F31xx

Reset and clock control (RCC)
UM1581
342/584
DocID023800 Rev 1
 #define: RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)
 #define: RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)
 #define: RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)
 #define: RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)
 #define: RCC_APB1Periph_WWDG ((uint32_t)0x00000800)
 #define: RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)
 #define: RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)
 #define: RCC_APB1Periph_USART2 ((uint32_t)0x00020000)
 #define: RCC_APB1Periph_USART3 ((uint32_t)0x00040000)
 #define: RCC_APB1Periph_UART4 ((uint32_t)0x00080000)
 #define: RCC_APB1Periph_UART5 ((uint32_t)0x00100000)
 #define: RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)