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Sun Microsystems Sun Fire X4100 - Page 194

Sun Microsystems Sun Fire X4100
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B-8 Sun Fire X4100/X4100 M2 and X4200/X4200 M2 Servers Service Manual August 2009
50 Programs the memory hole or any implementation that needs an adjustment in system
RAM size.
52 Updates the CMOS memory size from memory found in the memory test. Allocates
memory for the Extended BIOS Data Area from base memory.
60 Initializes NUM-LOCK status and programs the KBD typematic rate.
75 Initializes Int-13 and prepares for IPL detection.
78 Initializes IPL devices controlled by BIOS and option ROMs.
7A Initializes remaining option ROMs.
7C Generates and writes the contents of ESCD in NVRam.
84 Logs errors encountered during POST.
85 Displays errors to the user and gets the user’s response
87 Executes BIOS setup if needed/requested.
8C After completing all device initialization, programs any user selectable parameters relating
to the NB/SB, such as timing parameters, noncacheable regions and the shadow RAM
cacheability, and do any other NB/SB/PCIX/OEM-specific programming needed during
late POST. Initiates background scrubbing for the DRAM, and sets up L1 and L2 caches
based on setup questions. Gets the DRAM scrub limits from each node. Applies
workarounds for erratum #101.
8D Builds ACPI tables (if ACPI is supported).
8E Programs the peripheral parameters. Enables/disables the NMI as selected.
90 Initializes late POST system management interrupt.
A0 Checks boot password if installed.
A1 Cleans-up work necessary before booting to OS.
A2 Prepares the runtime image for different BIOS modules. Fills the free area in the F000h
segment with 0FFh. Initializes the Microsoft IRQ routing table. Prepares the runtime
language module. Disables the system configuration display if needed.
A4 Initializes the runtime language module.
A7 Displays the system configuration screen if enabled. Initializes the CPUs before boot,
which includes the programming of the MTRRs.
A8 Prepares the CPU for OS boot including final MTRR values.
A9 Waits for user input at the config display, if needed.
AA Uninstalls the POST INT1Ch vector and the INT09h vector. Deinitializes the ADM
module.
AB Prepares the BBS for Int 19 boot.
TABLE B-2 POST Code Checkpoints (Continued)
Post Code Description

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