Yamaha DSP-AZ2 - IC Data: MB87 J0470 (Continued); External Memory WAIT Mode

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RX-V3300/DSP-AZ2
RX-V3300/DSP-AZ2
IC504 : MB87J0470 (DSP P.C.B.)
DECODER
No. Name I/O Function
81 VSS Ground
82 AD9 O External memory address (SRAM)
83 AD12 O External memory address (SRAM)
84 AD11 O External memory address (SRAM)
85 AD10 O External memory address (SRAM)
86 TDO O Simple emulation data output
87 TMS I Simple emulation data input start/end
88 XTRST I Simple emulation asynchronous BREAK input
89 TCK I Simple emulation clock input
90 TDI I Simple emulation data input
91 VSS Ground
92 AD8 O External memory address (SRAM)
93 AD7 O External memory address (SRAM)
94 AD6 O External memory address (SRAM)
95 AD5 O External memory address (SRAM)
96 AD4 O External memory address (SRAM)
97 AD3 O External memory address (SRAM)
98 D7 I/O External memory data input/output (SRAM)
99 D6 I/O External memory data input/output (SRAM)
100 VDDI Power
101 VSS Ground
102 D5 I/O External memory data input/output (SRAM)
103 D4 I/O External memory data input/output (SRAM)
104 D3 I/O External memory data input/output (SRAM)
105 D2 I/O External memory data input/output (SRAM)
106 VDDE Power
107 D1 I/O External memory data input/output (SRAM)
108 D0 I/O External memory data input/output (SRAM)
109 AD2 O External memory address (SRAM)
110 AD1 O External memory address (SRAM)
111 VSS Ground
112 AD0 O External memory address (SRAM)
113 PRST I PLL initialization
114 SDTI3 I Data input for audio I/F
115 SDTI4 I Data input for audio I/F
116 SYNC I Synchronous/asynchronous select (L: Synchronous, H: Asynchronous)
117 TCNT I Test terminal (connected to GND)
118 GP11 I/O General purpose port GP11 data input/output
119 TST I Test terminal (connected to GND)
120 VDDI Power
*1: External memory WAIT mode
WMD1 WMD0 Wait cycle Use prohibited
0 0 Rewrite
0 1 5 cycle Disable
1 0 15 cycle Enable
1 1 30 cycle Enable