Abov MC96F6332D - Usi1 (Uart + Spi + I2 C)

MC96F6432
232 June 22, 2018 Ver. 2.9
11.13 USI1 (UART + SPI + I2C)
11.13.1 Overview
The USI1 consists of USI1 control register1/2/3/4, USI1 status register 1/2, USI1 baud-rate generation register,
USI1 data register, USI1 SDA hold time register, USI1 SCL high period register, USI1 SCL low period register,
and USI1 slave address register (USI1CR1, USI1CR2, USI1CR3, USI1CR4, USI1ST1, USI1ST2, USI1BD,
USI1DR, USI1SDHR, USI1SCHR, USI1SCLR, USI1SAR).
The operation mode is selected by the operation mode of USI1 selection bits (USI1MS[1:0]).
It has four operating modes:
- Asynchronous mode (UART)
- Synchronous mode
- SPI mode
- I2C mode